Technical Field
The present invention relates to a switching regulator which outputs a desired voltage from an output terminal.
Background Art
FIG. 6 is a circuit diagram illustrating a related art switching regulator.
When the voltage of an output terminal 6 becomes lower than a prescribed voltage, and a feedback voltage VFB is lowered more than a reference voltage VREF, an error comparator 610 outputs an H signal. When the H signal is inputted to an input terminal S, an R-S flip-flop circuit 609 outputs the H signal from an output terminal Q. An output control circuit 615 turns on a PMOS transistor 602 and turns off an NMOS transistor 604 through drivers 607 and 608 respectively. In that state, the H signal is outputted from a node N1 to raise the voltage of the output terminal 6 through an inductor 603 and an output capacitor 605.
On the other hand, after the H signal of the node N1 is inputted and a prescribed time has elapsed, an on-time control circuit 620 outputs the H signal to an input terminal R of the R-S flip-flop circuit 609. Then, the R-S flip-flop circuit 609 turns off the PMOS transistor 602 through the driver 607.
A minimum off-time generation circuit 611 monitors the input signal of the driver 607 and outputs a signal based on the state of the input signal to the output control circuit 615. That is, with the turned-off of the PMOS transistor 602 as a trigger, the minimum off-time generation circuit 611 controls an off-time of the PMOS transistor 602 to be a constant time or more.
Since the signal turning on the PMOS transistor 602 for the fixed time is outputted when the feedback voltage VFB falls below the reference voltage VREF, this control is called COT (Constant On Time) control (refer to, for example, Patent Document 1).
[Patent Document 1]
U.S. Pat. No. 8,476,887 Specification